In recent years, development in creating a 1T1R non-volatile memory is vigorously pursued, which combines a so-called resistance-change memory device recording low-resistance/high-resistance states by applying an electric pulse with a transistor array.
As a fabrication process of the resistance-change memory device, a method of forming a memory layer and an upper electrode on a bottom electrode processed in each bit to thereby form a memory device at a contact portion between the bottom electrode and the memory layer is known in related art (for example, refer to International publication WO2008/117371 pamphlet (Patent Document 1), (paragraph 0072)).